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ASTM International, 01/01/2005
Publisher: ASTM
File Format: PDF
$29.00$58.00
Published:01/01/2005
Pages:7
File Size:1 file , 140 KB
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1.1 This test method covers the measurement of common-emitter d-c current gain (forward, hFE, or inverted, hFEI) of bipolar transistors, for which the collector-emitter leakage current, ICEO, is less than 10% of the collector current, IC, at which the measurement is to be made, and for which the shunt leakage current in the base circuit is less than 10% of the base current required.
1.2 This test method is suitable for measurement of common-emitter d-c current gain at a single given value of test transistor collector current or over a given range of collector currents (for example, over the range of the transistor to be tested).
1.2.1 The nominal ranges of collector current over which the three test circuits are intended to be used are as follows:
1.2.1.1 Circuit 1, less than 100 [mu]A,
1.2.1.2 Circuit 2, from 100 [mu]A to 100 mA, and
1.2.1.3 Circuit 3, greater than 100 mA.
1.3 This test method incorporates tests to determine if the power dissipated in the transistor is low enough that the temperature of the junction is approximately the same as the ambient temperature.
1.4 The values stated in International System of Units (SI) are to be regarded as standard. No other units of measurement are included in this standard.
1.5 This standard does not purport to address the safety problems, if any, associated with its use. It is the responsibility of whoever uses this standard to consult and establish appropriate safety and health practices and determine the applicability of regulatory limitations prior to use.
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