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JEDEC Solid State Technology Association, 12/01/2022
Publisher: JEDEC
File Format: PDF
$119.00$238.01
Published:01/12/2022
Pages:26
File Size:1 file , 1.2 MB
Note:This product is unavailable in Russia, Ukraine, Belarus
This method provides users with an acoustic microscopy process flow for detecting anomalies (delaminations, cracks, mold compound voids, etc.) nondestructively in encapsulated electronic devices while achieving reproducibility.
TRANSISTOR, GALLIUM ARSENIDE POWER FET, GENERIC SPECIFICATION
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ADDENDUM No. 2 to JESD24 - GATE CHARGE TEST METHOD
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ADDENDUM No. 6 to JESD12 - INTERFACE STANDARD FOR SEMICUSTOM INTEGRATED CIRCUITS
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ADDENDUM No. 4 to JESD24 - THERMAL IMPEDANCE MEASUREMENTS FOR BIPOLAR TRANSISTORS (DELTA BASE-EMITTER VOLTAGE METHOD)
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