JEDEC JESD 12-1B

ADDENDUM No. 1 to JESD12 - TERMS AND DEFINITIONS FOR GATE ARRAYS AND CELL-BASED INTEGRATED CIRCUITS

JEDEC Solid State Technology Association, 08/01/1993

Publisher: JEDEC

File Format: PDF

$30.00$60.00

Description

Published:01/08/1993

Pages:19

File Size:1 file

Note:This product is unavailable in Russia, Ukraine, Belarus

The purpose of this standard is to promote the uniform use of abbreviations, terms, and definitions throughout the semiconductor industry. It is a useful guide for users, manufactures, educators, technical writers, and others interested in the characterization, nomenclature, and classification of semicustom integrated circuits.

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