• JEDEC JESD 24-9 (R2002)

JEDEC JESD 24-9 (R2002)

ADDENDUM No. 9 to JESD24 - SHORT CIRCUIT WITHSTAND TIME TEST METHOD

JEDEC Solid State Technology Association, 08/01/1992

Publisher: JEDEC

File Format: PDF

$25.00$51.00


Published:01/08/1992

Pages:10

File Size:1 file , 130 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

Test method to determine how long a device can survive a short circuit condition with a given drive level.

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