• JEDEC JESD24-12

JEDEC JESD24-12

THERMAL IMPEDANCE MEASUREMENT FOR INSULATED GATE BIPOLAR TRANSISTORS - (Delta VCE(on) Method)

JEDEC Solid State Technology Association, 06/01/2004

Publisher: JEDEC

File Format: PDF

$28.00$56.00


Published:01/06/2004

File Size:1 file , 470 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

The purpose of this test method is to measure the thermal impedance of the IGBT (Insulated Gate Bipolar Transistor) under the specified conditions of applied voltage, current and pulse duration. The temperature sensitivity of the collector-emitter on voltage, VCE(on), is used as the junction temperature indicator. This is an alternative method to JEDEC Standard No. 24-6.

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