JEDEC JESD47J.01

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS

JEDEC Solid State Technology Association, 09/01/2017

Publisher: JEDEC

File Format: PDF

$37.00$74.00


Published:01/09/2017

Pages:30

File Size:1 file , 290 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard describes a baseline set of acceptance tests for use in qualifying electronic components as new products, a product family, or as products in a process which is being changed.

More JEDEC standard pdf

JEDEC JESD212B

JEDEC JESD212B

Graphics Double Data Rate (GDDR5) SGRAM Standard

$104.00 $208.00

JEDEC JESD22-A100D

JEDEC JESD22-A100D

CYCLED TEMPERATURE HUMIDITY BIAS LIFE TEST

$26.00 $53.00

JEDEC JESD209-3B

JEDEC JESD209-3B

Low Power Double Data Rate 3 SDRAM (LPDDR3)

$95.00 $191.00

JEDEC JESD216A

JEDEC JESD216A

SERIAL FLASH DISCOVERABLE PARAMETERS (SFDP)

$40.00 $80.00