• JEDEC JESD51-8

JEDEC JESD51-8

INTEGRATED CIRCUIT THERMAL TEST METHOD ENVIRONMENTAL CONDITIONS - JUNCTION-TO-BOARD

JEDEC Solid State Technology Association, 10/01/1999

Publisher: JEDEC

File Format: PDF

$28.00$56.00


Published:01/10/1999

Pages:16

File Size:1 file , 74 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This specification should be used in conjunction with the overview document JESD51, Methodology for the Thermal Measurement of Component Packages (Single Semiconductor Device) [1] and the electrical test procedures described in JESD51-1, 'Integrated Circuit Thermal Measurement Method (Single Semiconductor Device' [2. The environmental conditions described in this document are specifically designed for testing of integrated circuit devices that are mounted on standard test boards with two internal copper planes [3]. This standard is not applicable to packages that have asymmetric heat flow paths to the printed board caused by such thermal enhancements as fused leads (leads connected to the die pad) or power style packages with the exposed heat slug on one side of the package.

More JEDEC standard pdf

JEDEC JESD51-5

JEDEC JESD51-5

EXTENSION OF THERMAL TEST BOARD STANDARDS FOR PACKAGES WITH DIRECT THERMAL ATTACHMENT MECHANISMS

$24.00 $48.00

JEDEC JESD51-7

JEDEC JESD51-7

HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD FOR LEADED SURFACE MOUNT PACKAGES

$26.00 $53.00

JEDEC JEP134

JEDEC JEP134

GUIDELINES FOR PREPARING CUSTOMER-SUPPLIED BACKGROUND INFORMATION RELATING TO A SEMICONDUCTOR-DEVICE FAILURE ANALYSIS

$28.00 $56.00

JEDEC JESD67

JEDEC JESD67

I/O DRIVERS AND RECEIVERS WITH CONFIGURABLE COMMUNICATION VOLTAGE, IMPEDANCE, AND RECEIVER THRESHOLD

$28.00 $56.00