JEDEC JESD51-3

LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD FOR LEADED SURFACE MOUNT PACKAGES

JEDEC Solid State Technology Association, 08/01/1996

Publisher: JEDEC

File Format: PDF

$26.00$53.00

Description

Published:01/08/1996

Pages:11

File Size:1 file

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard describes design requirements for a single layer, leaded surface mount integrated circuit package thermal test board. The standard describes board material and geometry requirements, minimum trace lenghts, trace thickness, and routing considerations. Application includes still air and moving air thermal tests.

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