• JEDEC JESD51-50

JEDEC JESD51-50

Overview of Methodologies for the Thermal Measurement of Single- and Multi-Chip, Single- and Multi-PN-Junction Light-Emotting Diodes (LEDs)

JEDEC Solid State Technology Association, 04/18/2012

Publisher: JEDEC

File Format: PDF

$26.00$53.00


Published:18/04/2012

Pages:12

File Size:1 file , 73 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This document provides an overview of the methodology necessary for making meaningful thermal measurements on high-power light-emitting diodes (LEDs) built on single or multiple chips with one or more pn-junctions per chip. The actual methodology components are contained in separate detailed documents.

More JEDEC standard pdf

JEDEC JEP136

JEDEC JEP136

SIGNATURE ANALYSIS

$29.00 $59.00

JEDEC JESD70

JEDEC JESD70

2.5 V BiCMOS LOGIC DEVICE FAMILY SPECIFICATION WITH 5 V TOLERANT INPUTS AND OUTPUTS

$26.00 $53.00

JEDEC JESD71

JEDEC JESD71

STANDARD TEST AND PROGRAMMING LANGUAGE (STAPL)

$43.00 $87.00

JEDEC JESD73

JEDEC JESD73

DESCRIPTION OF 5 V BUS SWITCH WITH TTL-COMPATIBLE CONTROL INPUTS

$25.00 $51.00