• JEDEC JESD60A

JEDEC JESD60A

A PROCEDURE FOR MEASURING P-CHANNEL MOSFET HOT-CARRIER-INDUCED DEGRADATION AT MAXIMUM GATE CURRENT UNDER DC STRESS

JEDEC Solid State Technology Association, 09/01/2004

Publisher: JEDEC

File Format: PDF

$33.00$67.00


Published:01/09/2004

Pages:24

File Size:1 file , 85 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This method establishes a standard procedure for accelerated testing of the hot-carrier-induced change of a p-channel MOSFET. The objective is to provide a minimum set of measurements so that accurate comparisons can be made between different technologies. The measurements specified should be viewed as a starting pint in the characterization and benchmarking of the trasistor manufacturing process.

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