JEDEC JESD8-31

1.8 V HIGH-SPEED LVCMOS (HS_LVCMOS) INTERFACE

JEDEC Solid State Technology Association, 03/01/2018

Publisher: JEDEC

File Format: PDF

$24.00$48.00


Published:01/03/2018

Pages:8

File Size:1 file , 86 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This standard defines the dc and ac input levels, output levels, and input overshoot and undershoot specifications for the 1.8 V High-speed LVCMOS (HS_LVCMOS) interface. The non-terminated interface has a switching range that is nominally expected to be 0 V to 1.8 V.

More JEDEC standard pdf

JEDEC EIA 397-1

JEDEC EIA 397-1

ADDENDUM No. 1 TO EIA-397

$53.00 $106.00

JEDEC JESD10 (R2002)

JEDEC JESD10 (R2002)

LOW FREQUENCY POWER TRANSISTORS

$95.00 $191.00

JEDEC JEP69-B (R1999)

JEDEC JEP69-B (R1999)

PREFERRED LEAD CONFIGURATION FOR FIELD-EFFECT TRANSISTORS

$24.00 $48.00

JEDEC JESD313-B (R2001)

JEDEC JESD313-B (R2001)

THERMAL RESISTANCE MEASUREMENTS OF CONDUCTION COOLED POWER TRANSISTORS

$28.00 $56.00