• Your shopping cart is empty!

  • JEDEC JEP126

JEDEC JEP126

GUIDELINE FOR DEVELOPING AND DOCUMENTING PACKAGE ELECTRICAL MODELS DERIVED FROM COMPUTATIONAL ANALYSIS

JEDEC Solid State Technology Association, 05/01/1996

Publisher: JEDEC

File Format: PDF

$24.00$48.00


Published:01/05/1996

Pages:8

File Size:1 file , 240 KB

Note:This product is unavailable in Russia, Ukraine, Belarus

This publication provides a guideline to suppliers of IC components with a template for documenting the numerical simulation assumptions. In addition this guideline also suggests a model environment to reference when comparing various packages or component suppliers. This publication should improve the communication between the package model suppliers. This publication should improve the communication between the package model supplier and the end user.

More JEDEC standard pdf

JEDEC JEP131C

JEDEC JEP131C

Potential Failure Mode and Effects Analysis (FMEA)

$36.00 $72.00

JEDEC JESD47K

JEDEC JESD47K

STRESS-TEST-DRIVEN QUALIFICATION OF INTEGRATED CIRCUITS

$38.00 $76.00

JEDEC JESD250A

JEDEC JESD250A

Graphics Double Data Rate (GDDR6) SGRAM Standard

$114.00 $228.00

JEDEC JESD251

JEDEC JESD251

EXPANDED SERIAL PERIPHERAL INTERFACE (xSPI) FOR NON VOLATILE MEMORY DEVICES, VERSION 1.0

$58.00 $116.00